VLSI PROJECTS

DOMAIN : IEEE TRANSACTIONS ON IMAGE PROCESSING

1 IPEVL01 A PROCESSOR IN MEMORY
ARCHITECTURE FOR MULTIMEDIA
COMPRESSION
2007

2. IPEVL02 A VLSI PROGRESSIVE CODING
FOR WAVELET BASED IMAGE
COMPRESSION
2007

3. IPEVL03 REDUCED COMPLEXITY DELAYED
ALGORITHM FOR CONTEXT
BASED IMAGE PROCESSING
SYSTEM
2007

4. IPEVL04 A MEMORY EFFICIENT
PROGRESSIVE JPEG DECODER
2007

5. IPEVL05 A METHOD TO PERFORM A FFT
WITH PRIMITIVE IMAGE
TRANSFORMATIONS
2007


DOMAIN : : IEEE TRANSACTIONS ON COMMUNICATIONS

1 ICEVL01 HIGH SPEED RECURSION
ARCHITECTURE FOR MAP- BASED
TURBO DECODERS
2007

2. ICEVLO2 REGISTER FOR PHASE
DIFFERENCE BASED LOGIC
2007

3 ICEVL03 SHIFT REGISTER BASED DATA
TRANSPOSITION FOR COSE
EFFECTIVE DISCRETE COSINE
TRANSFORM 2007

4 ICEVL04 A ROBUST UART ARCHITECTURE
BASED ON RECURSIVE RUNNING
SUM FILTER FOR BETTER NOISE
PERFORMANCE.
2007

5 ICEVL05 DIGITAL DESIGN OF DS-CDMA
TRANSMITTER USING VHDL AND
FPGA
2007


DOMAIN :IEEE TRANSACTIONS ON VLSI

1 IVLSIC01 FPGA IMPLEMENTATION OF LOW
POWER PARALLEL MULTIPLIER
2007

2. IVLSIC02 DESIGNING EFFICIENT ONLINE
TESTABLE REVERSIBLE ADDER WITH
NEW REVERSABLE GATE
2007

3 IVLSIC03 COMPACT HARDWAE DESIGN OF
WHIRLPOOL HASHING CORE
2007

4 IVLSIC04 IMPLEMENTATION OF AES ON A
DYNAMICALLY RECONFIGURABLE
ARCHITECTURE.
2007

5. IVLSIC05 CONCURRENT ERROR DETECTION IN
REED SOLOMON ENCODERS AND
DECODERS
2007

6 IVLSIC06 ABSTRACTION AND REFINEMENT
TECHNIQUES IN AUTOMATED
DESIGN DEBUGGING
2007

7. IVLSIC07 NOVEL BCD ADDERS AND THEIR
REVERSIBLE LOGIC
IMPLEMENTATION FOR IEEE 754R
FORMAT.
2006

8. IVLSIC08 SHIFT INVERT CODING FOR LOW
POWER VLSI
2004

9. IVLSIC09 REAL TIME ADAPTIVE SPEECH
WATERMARKING SCHEME FOR
MOBILE APPLICATIONS
2003

10. IVLSIC10 A LIGHTWEIGHT ENCRYPTION
METHOD SUITABLE FOR COPYRIGHT
PROTECTION
1998